Design of Energy Efficient Data Processing Device for Cyber Security

Authors

  • Aditya Yashwant
  • Pushpanjali Pandey
  • Deepa Singh Sisodiya

Abstract

A recent survey concludes that there was 1.7 MB data every second created for every human being on this planet Earth in 2020. Security of this much data during processing is of paramount importance. The main function of a processing device is to handle the intermediate stage. Either central processing unit, or graphical processing unit can be considered as processing devices as they handle the intermediate stage to produce useful information. Processing of data using hardware-based processing device, enhances the security of data. Hardware based processing is not easy to break in compare to only software-based processing.  The prime objective of this research is on making this device more energy efficient and more secure. So, it will take less power and provide more security. Different IO standards and Spartan-6 FPGA are used to fill the research gap using Verilog. Frequency Scaling is used for reduction of total power consumption.

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Published

2023-04-10

How to Cite

Aditya Yashwant, Pushpanjali Pandey, & Deepa Singh Sisodiya. (2023). Design of Energy Efficient Data Processing Device for Cyber Security. RES MILITARIS, 13(3), 2000–2007. Retrieved from https://resmilitaris.net/index.php/resmilitaris/article/view/3689